These tools will no longer be maintained as of December 31, 2024. Archived website can be found here. PubMed4Hh GitHub repository can be found here. Contact NLM Customer Service if you have questions.
4. Probabilistic Circuit Implementation Based on P-Bits Using the Intrinsic Random Property of RRAM and P-Bit Multiplexing Strategy. Liu Y; Hu Q; Wu Q; Liu X; Zhao Y; Zhang D; Han Z; Cheng J; Ding Q; Han Y; Peng B; Jiang H; Xue X; Lv H; Yang J Micromachines (Basel); 2022 Jun; 13(6):. PubMed ID: 35744538 [TBL] [Abstract][Full Text] [Related]
5. Hardware Design for Autonomous Bayesian Networks. Faria R; Kaiser J; Camsari KY; Datta S Front Comput Neurosci; 2021; 15():584797. PubMed ID: 33762919 [TBL] [Abstract][Full Text] [Related]
6. Probabilistic computing using Cu Woo KS; Kim J; Han J; Kim W; Jang YH; Hwang CS Nat Commun; 2022 Sep; 13(1):5762. PubMed ID: 36180426 [TBL] [Abstract][Full Text] [Related]
7. An Improved VLSI Design of the ALU Based FIR Filter for Biomedical Image Filtering Application. Arulkumar M; Chandrasekaran M Curr Med Imaging; 2021; 17(2):276-287. PubMed ID: 32807061 [TBL] [Abstract][Full Text] [Related]
8. Probabilistic computing with voltage-controlled dynamics in magnetic tunnel junctions. Shao Y; Duffee C; Raimondo E; Davila N; Lopez-Dominguez V; Katine JA; Finocchio G; Khalili Amiri P Nanotechnology; 2023 Sep; 34(49):. PubMed ID: 37669644 [TBL] [Abstract][Full Text] [Related]
9. Programmable Threshold Logic Implementations in a Memristor Crossbar Array. Youn S; Lee J; Kim S; Park J; Kim K; Kim H Nano Lett; 2024 Mar; 24(12):3581-3589. PubMed ID: 38471119 [TBL] [Abstract][Full Text] [Related]
10. ParAlleL: A Novel Population-Based Approach to Biological Logic Gates. Millacura FA; Largey B; French CE Front Bioeng Biotechnol; 2019; 7():46. PubMed ID: 30949475 [No Abstract] [Full Text] [Related]
11. Butterfly interconnection implementation for an n-bit parallel ripple carry full adder. Sun DG; Weng ZH Appl Opt; 1991 May; 30(14):1781-5. PubMed ID: 20700358 [TBL] [Abstract][Full Text] [Related]
12. Memcomputing Numerical Inversion With Self-Organizing Logic Gates. Manukian H; Traversa FL; Di Ventra M; Manukian H; Traversa FL; Di Ventra M; Di Ventra M; Manukian H; Traversa FL IEEE Trans Neural Netw Learn Syst; 2018 Jun; 29(6):2645-2650. PubMed ID: 28500012 [TBL] [Abstract][Full Text] [Related]
13. Quantitative transformation for implementation of adder circuits in physical systems. Jones J; Whiting JG; Adamatzky A Biosystems; 2015 Aug; 134():16-23. PubMed ID: 26007225 [TBL] [Abstract][Full Text] [Related]
14. Area/latency optimized early output asynchronous full adders and relative-timed ripple carry adders. Balasubramanian P; Yamashita S Springerplus; 2016; 5():440. PubMed ID: 27104128 [TBL] [Abstract][Full Text] [Related]
15. Generation of Tunable Stochastic Sequences Using the Insulator-Metal Transition. Valle JD; Salev P; Gariglio S; Kalcheim Y; Schuller IK; Triscone JM Nano Lett; 2022 Feb; 22(3):1251-1256. PubMed ID: 35061947 [TBL] [Abstract][Full Text] [Related]
16. A Monolithic Stochastic Computing Architecture for Energy Efficient Arithmetic. Ravichandran H; Zheng Y; Schranghamer TF; Trainor N; Redwing JM; Das S Adv Mater; 2023 Jan; 35(2):e2206168. PubMed ID: 36308032 [TBL] [Abstract][Full Text] [Related]
17. On Practical Issues for Stochastic STDP Hardware With 1-bit Synaptic Weights. Yousefzadeh A; Stromatias E; Soto M; Serrano-Gotarredona T; Linares-Barranco B Front Neurosci; 2018; 12():665. PubMed ID: 30374283 [TBL] [Abstract][Full Text] [Related]