336 related articles for article (PubMed ID: 30400520)
1. Asymmetric Drain Extension Dual-kk Trigate Underlap FinFET Based on RF/Analog Circuit.
Han K; Qiao G; Deng Z; Zhang Y
Micromachines (Basel); 2017 Nov; 8(11):. PubMed ID: 30400520
[TBL] [Abstract][Full Text] [Related]
2. Comprehensive Power Gain Assessment of GaN-SOI-FinFET for Improved RF/Wireless Performance Using TCAD.
Kumar A; Gupta N; Goyal AK; Massoud Y
Micromachines (Basel); 2022 Aug; 13(9):. PubMed ID: 36144042
[TBL] [Abstract][Full Text] [Related]
3. Analog/RF Performance of T-Shape Gate Dual-Source Tunnel Field-Effect Transistor.
Chen S; Liu H; Wang S; Li W; Wang X; Zhao L
Nanoscale Res Lett; 2018 Oct; 13(1):321. PubMed ID: 30315380
[TBL] [Abstract][Full Text] [Related]
4. Analyses on RF Performances of Silicon-Compatible InGaAs-Based Planar-Type and Fin-Type Junctionless Field-Effect Transistors.
Seo JH; Yoon YJ; Cho S; Tae HS; Lee JH; Kang IM
J Nanosci Nanotechnol; 2015 Oct; 15(10):7615-9. PubMed ID: 26726384
[TBL] [Abstract][Full Text] [Related]
5. Development and Analysis of a Three-Fin Trigate Q-FinFET for a 3 nm Technology Node with a Strained-Silicon Channel System.
Nanda S; Dhar RS; Awwad F; Hussein MI
Nanomaterials (Basel); 2023 May; 13(10):. PubMed ID: 37242078
[TBL] [Abstract][Full Text] [Related]
6. A Feasible Alternative to FDSOI and FinFET: Optimization of W/La
Mah SK; Ker PJ; Ahmad I; Zainul Abidin NF; Ali Gamel MM
Materials (Basel); 2021 Sep; 14(19):. PubMed ID: 34640118
[TBL] [Abstract][Full Text] [Related]
7. Dependence of RF/Analog and Linearity Figure of Merits on Temperature in Ferroelectric FinFET: A Simulation Study.
Saha R; Goswami R; Bhowmick B; Baishya S
IEEE Trans Ultrason Ferroelectr Freq Control; 2020 Nov; 67(11):2433-2439. PubMed ID: 32746174
[TBL] [Abstract][Full Text] [Related]
8. Vertical Gate-All-Around Device Architecture to Improve the Device Performance for Sub-5-nm Technology.
Noh C; Han C; Won SM; Shin C
Micromachines (Basel); 2022 Sep; 13(9):. PubMed ID: 36144174
[TBL] [Abstract][Full Text] [Related]
9. The Optimization and Analysis of a Triple-Fin Heterostructure-on-Insulator Fin Field-Effect Transistor with a Stacked High-k Configuration and 10 nm Channel Length.
Saha P; Sankar Dhar R; Nanda S; Kumar K; Alathbah M
Nanomaterials (Basel); 2023 Nov; 13(23):. PubMed ID: 38063707
[TBL] [Abstract][Full Text] [Related]
10. Electrical characteristic fluctuation of 16-nm-gate trapezoidal bulk FinFET devices with fixed top-fin width induced by random discrete dopants.
Huang WT; Li Y
Nanoscale Res Lett; 2015; 10():116. PubMed ID: 25897299
[TBL] [Abstract][Full Text] [Related]
11. 3D modeling of dual-gate FinFET.
Mil'shtein S; Devarakonda L; Zanchi B; Palma J
Nanoscale Res Lett; 2012 Nov; 7(1):625. PubMed ID: 23148493
[TBL] [Abstract][Full Text] [Related]
12. Exploration of underlap induced high-k spacer with gate stack on strain channel cylindrical nanowire FET for enriched performance.
Barik R; Dhar RS; Hussein MI
Sci Rep; 2024 Feb; 14(1):2902. PubMed ID: 38316975
[TBL] [Abstract][Full Text] [Related]
13. Sensing with Advanced Computing Technology: Fin Field-Effect Transistors with High-k Gate Stack on Bulk Silicon.
Rigante S; Scarbolo P; Wipf M; Stoop RL; Bedner K; Buitrago E; Bazigos A; Bouvet D; Calame M; Schönenberger C; Ionescu AM
ACS Nano; 2015 May; 9(5):4872-81. PubMed ID: 25817336
[TBL] [Abstract][Full Text] [Related]
14. Implementation of Gate-All-Around Gate-Engineered Charge Plasma Nanowire FET-Based Common Source Amplifier.
Singh S; Solay LR; Anand S; Kumar N; Ranjan R; Singh A
Micromachines (Basel); 2023 Jun; 14(7):. PubMed ID: 37512666
[TBL] [Abstract][Full Text] [Related]
15. Diamond FinFET without Hydrogen Termination.
Huang B; Bai X; Lam SK; Tsang KK
Sci Rep; 2018 Feb; 8(1):3063. PubMed ID: 29449602
[TBL] [Abstract][Full Text] [Related]
16. Double-gate junctionless transistor for analog applications.
Baruah RK; Pally R
J Nanosci Nanotechnol; 2013 Mar; 13(3):1802-7. PubMed ID: 23755595
[TBL] [Abstract][Full Text] [Related]
17. The understanding of the impact of efficiently optimized underlap length on analog/RF performance parameters of GNR-FETs.
Ahmad MA; Kumar J
Sci Rep; 2023 Aug; 13(1):13872. PubMed ID: 37620403
[TBL] [Abstract][Full Text] [Related]
18. Trade-off analysis between g
Ahmad MA; Kumar P; Mech BC; Kumar J
Sci Rep; 2024 May; 14(1):10218. PubMed ID: 38702353
[TBL] [Abstract][Full Text] [Related]
19. Core Insulator Nanosheet Transistor and Structure Optimization to Improve Gate Electrostatic Characteristics.
Joung S; Kim S
J Nanosci Nanotechnol; 2020 Aug; 20(8):4690-4698. PubMed ID: 32126642
[TBL] [Abstract][Full Text] [Related]
20. Novel High-Energy-Efficiency AlGaN/GaN HEMT with High Gate and Multi-Recessed Buffer.
Zhu S; Jia H; Li T; Tong Y; Liang Y; Wang X; Zeng T; Yang Y
Micromachines (Basel); 2019 Jul; 10(7):. PubMed ID: 31269635
[TBL] [Abstract][Full Text] [Related]
[Next] [New Search]
