These tools will no longer be maintained as of December 31, 2024. Archived website can be found here. PubMed4Hh GitHub repository can be found here. Contact NLM Customer Service if you have questions.


BIOMARKERS

Molecular Biopsy of Human Tumors

- a resource for Precision Medicine *

178 related articles for article (PubMed ID: 33132409)

  • 1. A 2.3-ps RMS Resolution Time-to-Digital Converter Implemented in a Low-Cost Cyclone V FPGA.
    Sui T; Zhao Z; Xie S; Xie Y; Zhao Y; Huang Q; Xu J; Peng Q
    IEEE Trans Instrum Meas; 2019 Oct; 68(10):3647-3660. PubMed ID: 33132409
    [TBL] [Abstract][Full Text] [Related]  

  • 2. An 8.8 ps RMS Resolution Time-To-Digital Converter Implemented in a 60 nm FPGA with Real-Time Temperature Correction.
    Song Z; Zhao Z; Yu H; Yang J; Zhang X; Sui T; Xu J; Xie S; Huang Q; Peng Q
    Sensors (Basel); 2020 Apr; 20(8):. PubMed ID: 32290511
    [TBL] [Abstract][Full Text] [Related]  

  • 3. A 6.6 ps RMS resolution time-to-digital converter using interleaved sampling method in a 28 nm FPGA.
    Xia H; Cao G; Dong N
    Rev Sci Instrum; 2019 Apr; 90(4):044706. PubMed ID: 31042985
    [TBL] [Abstract][Full Text] [Related]  

  • 4. An 18-ps TDC using timing adjustment and bin realignment methods in a Cyclone-IV FPGA.
    Cao G; Xia H; Dong N
    Rev Sci Instrum; 2018 May; 89(5):054707. PubMed ID: 29864821
    [TBL] [Abstract][Full Text] [Related]  

  • 5. A 4.8 ps root-mean-square resolution time-to-digital converter implemented in a 20 nm Cyclone-10 GX field-programmable gate array.
    Yu X; Xia H; Li W; Zhang J; Chang S
    Rev Sci Instrum; 2022 Aug; 93(8):085001. PubMed ID: 36050100
    [TBL] [Abstract][Full Text] [Related]  

  • 6. A high resolution time-to-digital-convertor based on a carry-chain and DSP48E1 adders in a 28-nm field-programmable-gate-array.
    Qin X; Zhu MD; Zhang WZ; Lin YH; Rui Y; Rong X; Du J
    Rev Sci Instrum; 2020 Feb; 91(2):024708. PubMed ID: 32113441
    [TBL] [Abstract][Full Text] [Related]  

  • 7. A 7.4 ps FPGA-Based TDC with a 1024-Unit Measurement Matrix.
    Zhang M; Wang H; Liu Y
    Sensors (Basel); 2017 Apr; 17(4):. PubMed ID: 28420121
    [TBL] [Abstract][Full Text] [Related]  

  • 8. A Low Temperature Coefficient Time-to-Digital Converter with 1.3 ps Resolution Implemented in a 28 nm FPGA.
    Mao X; Yang F; Wei F; Shi J; Cai J; Cai H
    Sensors (Basel); 2022 Mar; 22(6):. PubMed ID: 35336481
    [TBL] [Abstract][Full Text] [Related]  

  • 9. A Size, Weight, Power, and Cost-Efficient 32-Channel Time to Digital Converter Using a Novel Wave Union Method.
    Alshahry SM; Alshehry AH; Alhazmi AK; Chodavarapu VP
    Sensors (Basel); 2023 Jul; 23(14):. PubMed ID: 37514914
    [TBL] [Abstract][Full Text] [Related]  

  • 10. A high-linearity time-to-digital converter based on dynamically delay-adjustable looped carry chains on FPGAs.
    Cui K; Li X; Zhu R
    Rev Sci Instrum; 2018 Aug; 89(8):084704. PubMed ID: 30184691
    [TBL] [Abstract][Full Text] [Related]  

  • 11. Design of a high-precision time-to-digital converter in an Elitestek Ti60 field-programmable-gate-array.
    He Z; Wen X; Wang J; Ma Q; Yin Z
    Rev Sci Instrum; 2024 Aug; 95(8):. PubMed ID: 39166914
    [TBL] [Abstract][Full Text] [Related]  

  • 12. A Low-Resources TDC for Multi-Channel Direct ToF Readout Based on a 28-nm FPGA.
    Parsakordasiabi M; Vornicu I; Rodríguez-Vázquez Á; Carmona-Galán R
    Sensors (Basel); 2021 Jan; 21(1):. PubMed ID: 33466355
    [TBL] [Abstract][Full Text] [Related]  

  • 13. Dual-Phase Tapped-Delay-Line Time-to-Digital Converter With On-the-Fly Calibration Implemented in 40 nm FPGA.
    Won JY; Kwon SI; Yoon HS; Ko GB; Son JW; Lee JS
    IEEE Trans Biomed Circuits Syst; 2016 Feb; 10(1):231-42. PubMed ID: 25775497
    [TBL] [Abstract][Full Text] [Related]  

  • 14. A Study on the Effect of Temperature Variations on FPGA-Based Multi-Channel Time-to-Digital Converters.
    Alshehry AH; Alshahry SM; Alhazmi AK; Chodavarapu VP
    Sensors (Basel); 2023 Sep; 23(18):. PubMed ID: 37765729
    [TBL] [Abstract][Full Text] [Related]  

  • 15. A simple Field Programmable Gate Array (FPGA) based high precision low-jitter delay generator.
    Chen Z; Wang X; Zhou Z; Moro R; Ma L
    Rev Sci Instrum; 2021 Feb; 92(2):024701. PubMed ID: 33648091
    [TBL] [Abstract][Full Text] [Related]  

  • 16. High Spatial Resolution Detector System Based on Reconfigurable Dual-FPGA Approach for Coincidence Measurements.
    Cautero M; Garzetti F; Lusardi N; Sergo R; Stebel L; Costa A; Bonanno G; Ronconi E; Geraci A; Píš I; Magnano E; Pedio M; Cautero G
    Sensors (Basel); 2024 Aug; 24(16):. PubMed ID: 39204929
    [TBL] [Abstract][Full Text] [Related]  

  • 17. A new realization of time-to-digital converters based on FPGA internal routing resources.
    Wang H; Zhang M; Yao Q
    IEEE Trans Ultrason Ferroelectr Freq Control; 2013 Sep; 60(9):1787-95. PubMed ID: 24658711
    [TBL] [Abstract][Full Text] [Related]  

  • 18. A time digitizer for space instrumentation using a field programmable gate array.
    Rogacki S; Zurbuchen TH
    Rev Sci Instrum; 2013 Aug; 84(8):083107. PubMed ID: 24007053
    [TBL] [Abstract][Full Text] [Related]  

  • 19. Prototype development of a three-stage, high-precision, low-jitter, wide-range digital delay generator fully utilizing on-chip resources.
    Liu J; Deng P; Liu J; Wang Y
    Rev Sci Instrum; 2024 Jul; 95(7):. PubMed ID: 39072733
    [TBL] [Abstract][Full Text] [Related]  

  • 20. Highly Integrated FPGA-Only Signal Digitization Method Using Single-Ended Memory Interface Input Receivers for Time-of-Flight PET Detectors.
    Won JY; Lee JS
    IEEE Trans Biomed Circuits Syst; 2018 Dec; 12(6):1401-1409. PubMed ID: 30113901
    [TBL] [Abstract][Full Text] [Related]  

    [Next]    [New Search]
    of 9.