These tools will no longer be maintained as of December 31, 2024. Archived website can be found here. PubMed4Hh GitHub repository can be found here. Contact NLM Customer Service if you have questions.


BIOMARKERS

Molecular Biopsy of Human Tumors

- a resource for Precision Medicine *

134 related articles for article (PubMed ID: 34832812)

  • 1. Physical and Electrical Analysis of Poly-Si Channel Effect on SONOS Flash Memory.
    Jeong JK; Sung JY; Ko WS; Nam KR; Lee HD; Lee GW
    Micromachines (Basel); 2021 Nov; 12(11):. PubMed ID: 34832812
    [TBL] [Abstract][Full Text] [Related]  

  • 2. Investigation of Intra-Nitride Charge Migration Suppression in SONOS Flash Memory.
    Yang SD; Jung JK; Lim JG; Park SG; Lee HD; Lee GW
    Micromachines (Basel); 2019 May; 10(6):. PubMed ID: 31146426
    [TBL] [Abstract][Full Text] [Related]  

  • 3. Nanoscale two-bit/cell NAND silicon-oxide-nitride-oxide-silicon memory device with different tunneling oxide thicknesses.
    Kim HJ; You JH; Kim SH; Kwack KD; Kim TW
    J Nanosci Nanotechnol; 2011 Jul; 11(7):6109-13. PubMed ID: 22121667
    [TBL] [Abstract][Full Text] [Related]  

  • 4. Dependence of Grain Size on the Performance of a Polysilicon Channel TFT for 3D NAND Flash Memory.
    Kim SY; Park JK; Hwang WS; Lee SJ; Lee KH; Pyi SH; Cho BJ
    J Nanosci Nanotechnol; 2016 May; 16(5):5044-8. PubMed ID: 27483868
    [TBL] [Abstract][Full Text] [Related]  

  • 5. Electrical characteristics of nanoscale NAND silicon-oxide-nitride-oxide-silicon flash memory devices fabricated on SOI substrates.
    Ryu JT; You JH; Yoo KH; Kim TW
    J Nanosci Nanotechnol; 2011 Aug; 11(8):7512-5. PubMed ID: 22103232
    [TBL] [Abstract][Full Text] [Related]  

  • 6. High Pressure Deuterium Passivation of Charge Trapping Layer for Nonvolatile Memory Applications.
    Sung JY; Jeong JK; Ko WS; Byun JH; Lee HD; Lee GW
    Micromachines (Basel); 2021 Oct; 12(11):. PubMed ID: 34832728
    [TBL] [Abstract][Full Text] [Related]  

  • 7. 3D NAND Flash Memory Based on Double-Layer NC-Si Floating Gate with High Density of Multilevel Storage.
    Yu X; Ma Z; Shen Z; Li W; Chen K; Xu J; Xu L
    Nanomaterials (Basel); 2022 Jul; 12(14):. PubMed ID: 35889681
    [TBL] [Abstract][Full Text] [Related]  

  • 8. High-performance bottom-gate poly-Si polysilicon-oxide-nitride-oxide-silicon thin film transistors crystallized by excimer laser irradiation for two-bit nonvolatile memory applications.
    Lee IC; Kuo HH; Tsai CC; Wang CL; Yang PY; Wang JL; Cheng HC
    J Nanosci Nanotechnol; 2012 Jul; 12(7):5318-24. PubMed ID: 22966564
    [TBL] [Abstract][Full Text] [Related]  

  • 9. A hot hole-programmed and low-temperature-formed SONOS flash memory.
    Chang YM; Yang WL; Liu SH; Hsiao YP; Wu JY; Wu CC
    Nanoscale Res Lett; 2013 Jul; 8(1):340. PubMed ID: 23899050
    [TBL] [Abstract][Full Text] [Related]  

  • 10. Temperature Dependence According to Grain Boundary Potential Barrier Variation in Vertical NAND Flash Cell with Polycrystalline-Silicon Channel.
    Yang HJ; Oh YT; Kim KB; Kweon JY; Lee GH; Choi ES; Park SK; Song YH
    J Nanosci Nanotechnol; 2017 Apr; 17(4):2628-632. PubMed ID: 29664250
    [TBL] [Abstract][Full Text] [Related]  

  • 11. Effects of the Grain Boundary and Interface Traps on the Electrical Characteristics of 3D NAND Flash Memory Devices.
    Lee JG; Kim TW
    J Nanosci Nanotechnol; 2018 Mar; 18(3):1944-1947. PubMed ID: 29448689
    [TBL] [Abstract][Full Text] [Related]  

  • 12. Nb₂O₅ and Ti-Doped Nb₂O₅ Charge Trapping Nano-Layers Applied in Flash Memory.
    Wang JC; Kao CH; Wu CH; Lin CF; Lin CJ
    Nanomaterials (Basel); 2018 Oct; 8(10):. PubMed ID: 30297613
    [TBL] [Abstract][Full Text] [Related]  

  • 13. Interface engineering of 9X stacked 3D NAND flash memory using hydrogen post-treatment annealing.
    Choi S; Kim S; Bang S; Kim J; Park DG; Jin S; Kim MJ; Kwon E; Lee JW
    Nanotechnology; 2022 Oct; 34(2):. PubMed ID: 36198255
    [TBL] [Abstract][Full Text] [Related]  

  • 14. A junctionless SONOS nonvolatile memory device constructed with in situ-doped polycrystalline silicon nanowires.
    Su CJ; Su TK; Tsai TI; Lin HC; Huang TY
    Nanoscale Res Lett; 2012 Feb; 7(1):162. PubMed ID: 22373446
    [TBL] [Abstract][Full Text] [Related]  

  • 15. Charge trapping devices using a bilayer oxide structure.
    Kim M; Sundararaman R; Tiwari S; Lee JW
    J Nanosci Nanotechnol; 2012 Jan; 12(1):423-7. PubMed ID: 22523996
    [TBL] [Abstract][Full Text] [Related]  

  • 16. Improving Memory Characteristics of Hydrogenated Nanocrystalline Silicon Germanium Nonvolatile Memory Devices by Controlling Germanium Contents.
    Kim J; Jang K; Phu NT; Trinh TT; Raja J; Kim T; Cho J; Kim S; Park J; Jung J; Lee YJ; Yi J
    J Nanosci Nanotechnol; 2016 May; 16(5):4984-8. PubMed ID: 27483856
    [TBL] [Abstract][Full Text] [Related]  

  • 17. Activation Enhancement and Grain Size Improvement for Poly-Si Channel Vertical Transistor by Laser Thermal Annealing in 3D NAND Flash.
    Yang T; Xia Z; Fan D; Zhao D; Xie W; Yang Y; Liu L; Zhou W; Huo Z
    Micromachines (Basel); 2023 Jan; 14(1):. PubMed ID: 36677291
    [TBL] [Abstract][Full Text] [Related]  

  • 18. Characteristics of junctionless charge trap flash memory for 3D stacked NAND flash.
    Oh J; Na H; Park S; Sohn H
    J Nanosci Nanotechnol; 2013 Sep; 13(9):6413-5. PubMed ID: 24205672
    [TBL] [Abstract][Full Text] [Related]  

  • 19. Charge Storage and Reliability Characteristics of Nonvolatile Memory Capacitors with HfO
    Spassov D; Paskaleva A; Guziewicz E; Wozniak W; Stanchev T; Ivanov T; Wojewoda-Budka J; Janusz-Skuza M
    Materials (Basel); 2022 Sep; 15(18):. PubMed ID: 36143596
    [TBL] [Abstract][Full Text] [Related]  

  • 20. Fabrication and characterization of twin poly-Si thin film transistors EEPROM with a nitride charge trapping layer.
    Hung MF; Wu YC; Chiang JH; Chen JH; Chen LC
    J Nanosci Nanotechnol; 2011 Dec; 11(12):10419-23. PubMed ID: 22408918
    [TBL] [Abstract][Full Text] [Related]  

    [Next]    [New Search]
    of 7.