BIOMARKERS

Molecular Biopsy of Human Tumors

- a resource for Precision Medicine *

191 related articles for article (PubMed ID: 36015728)

  • 1. Design of Convolutional Neural Network Processor Based on FPGA Resource Multiplexing Architecture.
    Yan F; Zhang Z; Liu Y; Liu J
    Sensors (Basel); 2022 Aug; 22(16):. PubMed ID: 36015728
    [TBL] [Abstract][Full Text] [Related]  

  • 2. Pattern Classification Using Quantized Neural Networks for FPGA-Based Low-Power IoT Devices.
    Biswal MR; Delwar TS; Siddique A; Behera P; Choi Y; Ryu JY
    Sensors (Basel); 2022 Nov; 22(22):. PubMed ID: 36433289
    [TBL] [Abstract][Full Text] [Related]  

  • 3. A Hardware-Friendly High-Precision CNN Pruning Method and Its FPGA Implementation.
    Sui X; Lv Q; Zhi L; Zhu B; Yang Y; Zhang Y; Tan Z
    Sensors (Basel); 2023 Jan; 23(2):. PubMed ID: 36679624
    [TBL] [Abstract][Full Text] [Related]  

  • 4. FPGA-based neural network accelerators for millimeter-wave radio-over-fiber systems.
    Lee J; He J; Wang K
    Opt Express; 2020 Apr; 28(9):13384-13400. PubMed ID: 32403814
    [TBL] [Abstract][Full Text] [Related]  

  • 5. A Configurable and Fully Synthesizable RTL-Based Convolutional Neural Network for Biosensor Applications.
    Kumar P; Yingge H; Ali I; Pu YG; Hwang KC; Yang Y; Jung YJ; Huh HK; Kim SK; Yoo JM; Lee KY
    Sensors (Basel); 2022 Mar; 22(7):. PubMed ID: 35408074
    [TBL] [Abstract][Full Text] [Related]  

  • 6. Improved Handwritten Digit Recognition Using Convolutional Neural Networks (CNN).
    Ahlawat S; Choudhary A; Nayyar A; Singh S; Yoon B
    Sensors (Basel); 2020 Jun; 20(12):. PubMed ID: 32545702
    [TBL] [Abstract][Full Text] [Related]  

  • 7. A Heterogeneous Hardware Accelerator for Image Classification in Embedded Systems.
    PĂ©rez I; Figueroa M
    Sensors (Basel); 2021 Apr; 21(8):. PubMed ID: 33918668
    [TBL] [Abstract][Full Text] [Related]  

  • 8. Efficient FPGA Implementation of Convolutional Neural Networks and Long Short-Term Memory for Radar Emitter Signal Recognition.
    Wu B; Wu X; Li P; Gao Y; Si J; Al-Dhahir N
    Sensors (Basel); 2024 Jan; 24(3):. PubMed ID: 38339606
    [TBL] [Abstract][Full Text] [Related]  

  • 9. Resources and Power Efficient FPGA Accelerators for Real-Time Image Classification.
    Kyriakos A; Papatheofanous EA; Bezaitis C; Reisis D
    J Imaging; 2022 Apr; 8(4):. PubMed ID: 35448240
    [TBL] [Abstract][Full Text] [Related]  

  • 10. A Hardware-Friendly Low-Bit Power-of-Two Quantization Method for CNNs and Its FPGA Implementation.
    Sui X; Lv Q; Bai Y; Zhu B; Zhi L; Yang Y; Tan Z
    Sensors (Basel); 2022 Sep; 22(17):. PubMed ID: 36081072
    [TBL] [Abstract][Full Text] [Related]  

  • 11. FPGA-Based Hybrid-Type Implementation of Quantized Neural Networks for Remote Sensing Applications.
    Wei X; Liu W; Chen L; Ma L; Chen H; Zhuang Y
    Sensors (Basel); 2019 Feb; 19(4):. PubMed ID: 30813259
    [TBL] [Abstract][Full Text] [Related]  

  • 12. Designing Deep Learning Hardware Accelerator and Efficiency Evaluation.
    Qi Z; Chen W; Naqvi RA; Siddique K
    Comput Intell Neurosci; 2022; 2022():1291103. PubMed ID: 35875766
    [TBL] [Abstract][Full Text] [Related]  

  • 13. EDSSA: An Encoder-Decoder Semantic Segmentation Networks Accelerator on OpenCL-Based FPGA Platform.
    Huang H; Wu Y; Yu M; Shi X; Qiao F; Luo L; Wei Q; Liu X
    Sensors (Basel); 2020 Jul; 20(14):. PubMed ID: 32708851
    [TBL] [Abstract][Full Text] [Related]  

  • 14. Parameterizable Design on Convolutional Neural Networks Using Chisel Hardware Construction Language.
    Madineni MC; Vega M; Yang X
    Micromachines (Basel); 2023 Feb; 14(3):. PubMed ID: 36984938
    [TBL] [Abstract][Full Text] [Related]  

  • 15. Photonics-enabled spiking timing-dependent convolutional neural network for real-time image classification.
    Meng X; Shi N; Shi D; Li W; Li M
    Opt Express; 2022 May; 30(10):16217-16228. PubMed ID: 36221470
    [TBL] [Abstract][Full Text] [Related]  

  • 16. Acceleration of Deep Neural Network Training Using Field Programmable Gate Arrays.
    Tufa GT; Andargie FA; Bijalwan A
    Comput Intell Neurosci; 2022; 2022():8387364. PubMed ID: 36299439
    [TBL] [Abstract][Full Text] [Related]  

  • 17. An OpenCL-Based FPGA Accelerator for Faster R-CNN.
    An J; Zhang D; Xu K; Wang D
    Entropy (Basel); 2022 Sep; 24(10):. PubMed ID: 37420365
    [TBL] [Abstract][Full Text] [Related]  

  • 18. A Low-Power Hardware Architecture for Real-Time CNN Computing.
    Liu X; Cao C; Duan S
    Sensors (Basel); 2023 Feb; 23(4):. PubMed ID: 36850642
    [TBL] [Abstract][Full Text] [Related]  

  • 19. A Cost-Efficient High-Speed VLSI Architecture for Spiking Convolutional Neural Network Inference Using Time-Step Binary Spike Maps.
    Zhang L; Yang J; Shi C; Lin Y; He W; Zhou X; Yang X; Liu L; Wu N
    Sensors (Basel); 2021 Sep; 21(18):. PubMed ID: 34577214
    [TBL] [Abstract][Full Text] [Related]  

  • 20. FPGA Implementation of Complex-Valued Neural Network for Polar-Represented Image Classification.
    Ahmad M; Zhang L; Chowdhury MEH
    Sensors (Basel); 2024 Jan; 24(3):. PubMed ID: 38339614
    [TBL] [Abstract][Full Text] [Related]  

    [Next]    [New Search]
    of 10.