136 related articles for article (PubMed ID: 37110895)
1. High-Performance P- and N-Type SiGe/Si Strained Super-Lattice FinFET and CMOS Inverter: Comparison of Si and SiGe FinFET.
Yao YJ; Yang CR; Tseng TY; Chang HJ; Lin TJ; Luo GL; Hou FJ; Wu YC; Chang-Liao KS
Nanomaterials (Basel); 2023 Apr; 13(8):. PubMed ID: 37110895
[TBL] [Abstract][Full Text] [Related]
2. Four-Period Vertically Stacked SiGe/Si Channel FinFET Fabrication and Its Electrical Characteristics.
Li Y; Zhao F; Cheng X; Liu H; Zan Y; Li J; Zhang Q; Wu Z; Luo J; Wang W
Nanomaterials (Basel); 2021 Jun; 11(7):. PubMed ID: 34203194
[TBL] [Abstract][Full Text] [Related]
3. 4-Levels Vertically Stacked SiGe Channel Nanowires Gate-All-Around Transistor with Novel Channel Releasing and Source and Drain Silicide Process.
Cheng X; Li Y; Zhao F; Chen A; Liu H; Li C; Zhang Q; Yin H; Luo J; Wang W
Nanomaterials (Basel); 2022 Mar; 12(5):. PubMed ID: 35269377
[TBL] [Abstract][Full Text] [Related]
4. Analysis of CMOS Logic Inverter Based on Gate-All-Around Field-Effect Transistors with the Strained-Silicon Layer for Improving the Switching Performances.
Lee SH; Cho MS; Jung JH; Jang WD; Mun HJ; Jang J; Bae JH; Kang IM
J Nanosci Nanotechnol; 2020 Nov; 20(11):6632-6637. PubMed ID: 32604487
[TBL] [Abstract][Full Text] [Related]
5. High Thermoelectric Power Factor Realization in Si-Rich SiGe/Si Superlattices by Super-Controlled Interfaces.
Taniguchi T; Ishibe T; Naruse N; Mera Y; Alam MM; Sawano K; Nakamura Y
ACS Appl Mater Interfaces; 2020 Jun; 12(22):25428-25434. PubMed ID: 32427454
[TBL] [Abstract][Full Text] [Related]
6. Enhancing the Responsiveness of Thermoelectric Gas Sensors with Boron-Doped and Thermally Annealed SiGe Thin Films via Low-Pressure Chemical Vapor Deposition.
Shin W; Nishibori M; Itoh T; Izu N; Matsubara I
Sensors (Basel); 2024 May; 24(10):. PubMed ID: 38793910
[TBL] [Abstract][Full Text] [Related]
7. A Feasible Alternative to FDSOI and FinFET: Optimization of W/La
Mah SK; Ker PJ; Ahmad I; Zainul Abidin NF; Ali Gamel MM
Materials (Basel); 2021 Sep; 14(19):. PubMed ID: 34640118
[TBL] [Abstract][Full Text] [Related]
8. Structural Mapping of Functional Ge Layers Grown on Graded SiGe Buffers for sub-10 nm CMOS Applications Using Advanced X-ray Nanodiffraction.
Richard MI; Zoellner MH; Chahine GA; Zaumseil P; Capellini G; Häberlen M; Storck P; Schülli TU; Schroeder T
ACS Appl Mater Interfaces; 2015 Dec; 7(48):26696-700. PubMed ID: 26541318
[TBL] [Abstract][Full Text] [Related]
9. Sensing with Advanced Computing Technology: Fin Field-Effect Transistors with High-k Gate Stack on Bulk Silicon.
Rigante S; Scarbolo P; Wipf M; Stoop RL; Bedner K; Buitrago E; Bazigos A; Bouvet D; Calame M; Schönenberger C; Ionescu AM
ACS Nano; 2015 May; 9(5):4872-81. PubMed ID: 25817336
[TBL] [Abstract][Full Text] [Related]
10. Trench FinFET Nanostructure with Advanced Ferroelectric Nanomaterial HfZrO
Yan SC; Wu CH; Sun CJ; Lin YW; Yao YJ; Wu YC
Nanomaterials (Basel); 2022 Jun; 12(13):. PubMed ID: 35807999
[TBL] [Abstract][Full Text] [Related]
11. Highly Flexible Hybrid CMOS Inverter Based on Si Nanomembrane and Molybdenum Disulfide.
Das T; Chen X; Jang H; Oh IK; Kim H; Ahn JH
Small; 2016 Nov; 12(41):5720-5727. PubMed ID: 27608439
[TBL] [Abstract][Full Text] [Related]
12. Novel 14-nm Scallop-Shaped FinFETs (S-FinFETs) on Bulk-Si Substrate.
Xu W; Yin H; Ma X; Hong P; Xu M; Meng L
Nanoscale Res Lett; 2015 Dec; 10(1):958. PubMed ID: 26055484
[TBL] [Abstract][Full Text] [Related]
13. Growth and Selective Etch of Phosphorus-Doped Silicon/Silicon-Germanium Multilayers Structures for Vertical Transistors Application.
Li C; Lin H; Li J; Yin X; Zhang Y; Kong Z; Wang G; Zhu H; Radamson HH
Nanoscale Res Lett; 2020 Dec; 15(1):225. PubMed ID: 33296038
[TBL] [Abstract][Full Text] [Related]
14. Development and Analysis of a Three-Fin Trigate Q-FinFET for a 3 nm Technology Node with a Strained-Silicon Channel System.
Nanda S; Dhar RS; Awwad F; Hussein MI
Nanomaterials (Basel); 2023 May; 13(10):. PubMed ID: 37242078
[TBL] [Abstract][Full Text] [Related]
15. Design Technology Co-Optimization Strategy for Ge Fraction in SiGe Channel of SGOI FinFET.
Li S; Wu Z
Nanomaterials (Basel); 2023 May; 13(11):. PubMed ID: 37299612
[TBL] [Abstract][Full Text] [Related]
16. Top-down fabrication of fully CMOS-compatible silicon nanowire arrays and their integration into CMOS Inverters on plastic.
Lee M; Jeon Y; Moon T; Kim S
ACS Nano; 2011 Apr; 5(4):2629-36. PubMed ID: 21355599
[TBL] [Abstract][Full Text] [Related]
17. Formation of Self-Connected Si
Du L; Chen G; Lu W
Nanoscale Res Lett; 2017 Dec; 12(1):70. PubMed ID: 28120245
[TBL] [Abstract][Full Text] [Related]
18. High-precision deformation mapping in finFET transistors with two nanometre spatial resolution by precession electron diffraction.
Cooper D; Bernier N; Rouvière JL; Wang YY; Weng W; Madan A; Mochizuki S; Jagannathan H
Appl Phys Lett; 2017 May; 110(22):223109. PubMed ID: 28652641
[TBL] [Abstract][Full Text] [Related]
19. Investigate on the Mechanism of HfO
Yao Q; Ma X; Wang H; Wang Y; Wang G; Zhang J; Liu W; Wang X; Yan J; Li Y; Wang W
Nanomaterials (Basel); 2021 Apr; 11(4):. PubMed ID: 33918553
[TBL] [Abstract][Full Text] [Related]
20. Stacked SiGe nanosheets p-FET for Sub-3 nm logic applications.
Chu CL; Hsu SH; Chang WY; Luo GL; Chen SH
Sci Rep; 2023 Jun; 13(1):9433. PubMed ID: 37296220
[TBL] [Abstract][Full Text] [Related]
[Next] [New Search]
