These tools will no longer be maintained as of December 31, 2024. Archived website can be found here. PubMed4Hh GitHub repository can be found here. Contact NLM Customer Service if you have questions.
122 related articles for article (PubMed ID: 38398952)
1. A Novel Channel Preparation Scheme to Optimize Program Disturbance in Three-Dimensional NAND Flash Memory. You K; Jin L; Jia J; Huo Z Micromachines (Basel); 2024 Jan; 15(2):. PubMed ID: 38398952 [TBL] [Abstract][Full Text] [Related]
2. Self-Adaption of the GIDL Erase Promotes Stacking More Layers in 3D NAND Flash. Yang T; Zhang B; Wang Q; Jin L; Xia Z Micromachines (Basel); 2023 Mar; 14(3):. PubMed ID: 36985093 [TBL] [Abstract][Full Text] [Related]
3. Suppression of inhibit cell Vth disturbance in three dimensional stack NAND flash memory. Choe BI; Park BG; Lee JK; Lee JH J Nanosci Nanotechnol; 2013 Sep; 13(9):6382-8. PubMed ID: 24205666 [TBL] [Abstract][Full Text] [Related]
4. A Novel Program Scheme for Z-Interference Improvement in 3D NAND Flash Memory. Jia J; Jin L; Jia X; You K Micromachines (Basel); 2023 Apr; 14(4):. PubMed ID: 37421129 [TBL] [Abstract][Full Text] [Related]
5. Enhancement of the Electrical Characteristics for 3D NAND Flash Memory Devices Due to a Modified Cell Structure in the Gate Region. Lee YG; Jung HS; Kim TW J Nanosci Nanotechnol; 2019 Oct; 19(10):6148-6151. PubMed ID: 31026926 [TBL] [Abstract][Full Text] [Related]
6. Investigation of Erase Cycling Induced Joint Dummy Cell Disturbance in Dual-Deck 3D NAND Flash Memory. You K; Jin L; Jia J; Huo Z Micromachines (Basel); 2023 Oct; 14(10):. PubMed ID: 37893353 [TBL] [Abstract][Full Text] [Related]
7. Paving the Way for Pass Disturb-Free Vertical NAND Storage via a Dedicated and String-Compatible Pass Gate. Zhao Z; Woo S; Aabrar KA; Kirtania SG; Jiang Z; Deng S; Xiao Y; Mulaosmanovic H; Duenkel S; Kleimaier D; Soss S; Beyer S; Joshi R; Meninger S; Mohamed M; Kim K; Woo J; Lim S; Kim K; Kim W; Ha D; Narayanan V; Datta S; Yu S; Ni K ACS Appl Mater Interfaces; 2024 Oct; ():. PubMed ID: 39374172 [TBL] [Abstract][Full Text] [Related]
8. Adaptive Bitline Voltage Countermeasure for Neighbor Wordline Interference in 3D NAND Flash Memory-Based Sensors. Fan H; Tian X; Peng H; Shen Y; Li L; Li M; Gao L Sensors (Basel); 2023 Mar; 23(6):. PubMed ID: 36991921 [TBL] [Abstract][Full Text] [Related]
9. Exploring Disturb Characteristics in 2D and 3D Ferroelectric NAND Memory Arrays for Next-Generation Memory Technology. Kim IJ; Choi J; Lee JS ACS Appl Mater Interfaces; 2024 Jul; 16(26):33763-33770. PubMed ID: 38899561 [TBL] [Abstract][Full Text] [Related]
10. The Optimization of Gate All Around-L-Shaped Bottom Select Transistor in 3D NAND Flash Memory. Zou X; Jin L; Jiang D; Zhang Y; Chen G; Xia Z; Huo Z J Nanosci Nanotechnol; 2018 Aug; 18(8):5528-5533. PubMed ID: 29458606 [TBL] [Abstract][Full Text] [Related]
11. Investigation of Program Efficiency Overshoot in 3D Vertical Channel NAND Flash with Randomly Distributed Traps. Park C; Yoon JS; Nam K; Jang H; Park M; Baek RH Nanomaterials (Basel); 2023 Apr; 13(9):. PubMed ID: 37176997 [TBL] [Abstract][Full Text] [Related]
12. Impact of Program-Erase Operation Intervals at Different Temperatures on 3D Charge-Trapping Triple-Level-Cell NAND Flash Memory Reliability. Zheng X; Wu Y; Dong H; Liu Y; Sang P; Xiao L; Zhan X Micromachines (Basel); 2024 Aug; 15(9):. PubMed ID: 39337720 [TBL] [Abstract][Full Text] [Related]
13. Effect of Noncircular Channel on Distribution of Threshold Voltage in 3D NAND Flash Memory. Go D; Yoon G; Park J; Kim D; Kim J; Kim J; Lee JS Micromachines (Basel); 2023 Oct; 14(11):. PubMed ID: 38004865 [TBL] [Abstract][Full Text] [Related]
14. 3D NAND Flash Memory Based on Double-Layer NC-Si Floating Gate with High Density of Multilevel Storage. Yu X; Ma Z; Shen Z; Li W; Chen K; Xu J; Xu L Nanomaterials (Basel); 2022 Jul; 12(14):. PubMed ID: 35889681 [TBL] [Abstract][Full Text] [Related]
15. Novel Program Scheme of Vertical NAND Flash Memory for Reduction of Z-Interference. Yi SI; Kim J Micromachines (Basel); 2021 May; 12(5):. PubMed ID: 34065435 [TBL] [Abstract][Full Text] [Related]
16. Neuromorphic Computing Using NAND Flash Memory Architecture With Pulse Width Modulation Scheme. Lee ST; Lee JH Front Neurosci; 2020; 14():571292. PubMed ID: 33071744 [TBL] [Abstract][Full Text] [Related]
17. Dielectric Engineering to Suppress Cell-to-Cell Programming Voltage Interference in 3D NAND Flash Memory. Jung WJ; Park JY Micromachines (Basel); 2021 Oct; 12(11):. PubMed ID: 34832709 [TBL] [Abstract][Full Text] [Related]
18. Channel Modeling and Quantization Design for 3D NAND Flash Memory. Wang C; Mei Z; Li J; Shu F; He X; Kong L Entropy (Basel); 2023 Jun; 25(7):. PubMed ID: 37509912 [TBL] [Abstract][Full Text] [Related]
19. Insight into over Repair of Hot Carrier Degradation by GIDL Current in Si p-FinFETs Using Ultra-Fast Measurement Technique. Chang H; Wang G; Yang H; Liu Q; Zhou L; Ji Z; Yu R; Wu Z; Yin H; Du A; Li J; Luo J; Zhao C; Wang W Nanomaterials (Basel); 2023 Apr; 13(7):. PubMed ID: 37049352 [TBL] [Abstract][Full Text] [Related]
20. Optimal Energetic-Trap Distribution of Nano-Scaled Charge Trap Nitride for Wider Nam K; Park C; Yoon JS; Yun H; Jang H; Cho K; Kang HJ; Park MS; Sim J; Choi HC; Baek RH Nanomaterials (Basel); 2022 May; 12(11):. PubMed ID: 35683664 [TBL] [Abstract][Full Text] [Related] [Next] [New Search]