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  • Title: Few electron limit of n-type metal oxide semiconductor single electron transistors.
    Author: Prati E, De Michielis M, Belli M, Cocco S, Fanciulli M, Kotekar-Patil D, Ruoff M, Kern DP, Wharam DA, Verduijn J, Tettamanzi GC, Rogge S, Roche B, Wacquez R, Jehl X, Vinet M, Sanquer M.
    Journal: Nanotechnology; 2012 Jun 01; 23(21):215204. PubMed ID: 22552118.
    Abstract:
    We report the electronic transport on n-type silicon single electron transistors (SETs) fabricated in complementary metal oxide semiconductor (CMOS) technology. The n-type metal oxide silicon SETs (n-MOSSETs) are built within a pre-industrial fully depleted silicon on insulator (FDSOI) technology with a silicon thickness down to 10 nm on 200 mm wafers. The nominal channel size of 20 × 20 nm(2) is obtained by employing electron beam lithography for active and gate level patterning. The Coulomb blockade stability diagram is precisely resolved at 4.2 K and it exhibits large addition energies of tens of meV. The confinement of the electrons in the quantum dot has been modeled by using a current spin density functional theory (CS-DFT) method. CMOS technology enables massive production of SETs for ultimate nanoelectronic and quantum variable based devices.
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