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Journal Abstract Search

486 related items for PubMed ID: 22073905

  • 1. Integrated circuits and logic operations based on single-layer MoS2.
    Radisavljevic B, Whitwick MB, Kis A.
    ACS Nano; 2011 Dec 27; 5(12):9934-8. PubMed ID: 22073905
    [Abstract] [Full Text] [Related]

  • 2. Breakdown of high-performance monolayer MoS2 transistors.
    Lembke D, Kis A.
    ACS Nano; 2012 Nov 27; 6(11):10070-5. PubMed ID: 23039374
    [Abstract] [Full Text] [Related]

  • 3. Integrated circuits based on bilayer MoS₂ transistors.
    Wang H, Yu L, Lee YH, Shi Y, Hsu A, Chin ML, Li LJ, Dubey M, Kong J, Palacios T.
    Nano Lett; 2012 Sep 12; 12(9):4674-80. PubMed ID: 22862813
    [Abstract] [Full Text] [Related]

  • 4. Nonvolatile memory cells based on MoS2/graphene heterostructures.
    Bertolazzi S, Krasnozhon D, Kis A.
    ACS Nano; 2013 Apr 23; 7(4):3246-52. PubMed ID: 23510133
    [Abstract] [Full Text] [Related]

  • 5. Few-layer molybdenum disulfide transistors and circuits for high-speed flexible electronics.
    Cheng R, Jiang S, Chen Y, Liu Y, Weiss N, Cheng HC, Wu H, Huang Y, Duan X.
    Nat Commun; 2014 Oct 08; 5():5143. PubMed ID: 25295573
    [Abstract] [Full Text] [Related]

  • 6. Channel length scaling of MoS2 MOSFETs.
    Liu H, Neal AT, Ye PD.
    ACS Nano; 2012 Oct 23; 6(10):8563-9. PubMed ID: 22957650
    [Abstract] [Full Text] [Related]

  • 7. Complementary symmetry nanowire logic circuits: experimental demonstrations and in silico optimizations.
    Sheriff BA, Wang D, Heath JR, Kurtin JN.
    ACS Nano; 2008 Sep 23; 2(9):1789-98. PubMed ID: 19206417
    [Abstract] [Full Text] [Related]

  • 8. Single-layer MoS2 transistors.
    Radisavljevic B, Radenovic A, Brivio J, Giacometti V, Kis A.
    Nat Nanotechnol; 2011 Mar 23; 6(3):147-50. PubMed ID: 21278752
    [Abstract] [Full Text] [Related]

  • 9. Optimized structural designs for stretchable silicon integrated circuits.
    Kim DH, Liu Z, Kim YS, Wu J, Song J, Kim HS, Huang Y, Hwang KC, Zhang Y, Rogers JA.
    Small; 2009 Dec 23; 5(24):2841-7. PubMed ID: 19824002
    [Abstract] [Full Text] [Related]

  • 10. Coplanar-gate transparent graphene transistors and inverters on plastic.
    Kim BJ, Lee SK, Kang MS, Ahn JH, Cho JH.
    ACS Nano; 2012 Oct 23; 6(10):8646-51. PubMed ID: 22954200
    [Abstract] [Full Text] [Related]

  • 11. Si-nanowire-array-based NOT-logic circuits constructed on plastic substrates using top-down methods.
    Jeon Y, Kang J, Lee M, Moon T, Kim S.
    J Nanosci Nanotechnol; 2013 May 23; 13(5):3350-3. PubMed ID: 23858857
    [Abstract] [Full Text] [Related]

  • 12. Few electron limit of n-type metal oxide semiconductor single electron transistors.
    Prati E, De Michielis M, Belli M, Cocco S, Fanciulli M, Kotekar-Patil D, Ruoff M, Kern DP, Wharam DA, Verduijn J, Tettamanzi GC, Rogge S, Roche B, Wacquez R, Jehl X, Vinet M, Sanquer M.
    Nanotechnology; 2012 Jun 01; 23(21):215204. PubMed ID: 22552118
    [Abstract] [Full Text] [Related]

  • 13. Hysteresis in single-layer MoS2 field effect transistors.
    Late DJ, Liu B, Matte HS, Dravid VP, Rao CN.
    ACS Nano; 2012 Jun 26; 6(6):5635-41. PubMed ID: 22577885
    [Abstract] [Full Text] [Related]

  • 14. High frequency MoS2 nanomechanical resonators.
    Lee J, Wang Z, He K, Shan J, Feng PX.
    ACS Nano; 2013 Jul 23; 7(7):6086-91. PubMed ID: 23738924
    [Abstract] [Full Text] [Related]

  • 15. Vertically stacked multi-heterostructures of layered materials for logic transistors and complementary inverters.
    Yu WJ, Li Z, Zhou H, Chen Y, Wang Y, Huang Y, Duan X.
    Nat Mater; 2013 Mar 23; 12(3):246-52. PubMed ID: 23241535
    [Abstract] [Full Text] [Related]

  • 16. MoS2 nanosheets for top-gate nonvolatile memory transistor channel.
    Lee HS, Min SW, Park MK, Lee YT, Jeon PJ, Kim JH, Ryu S, Im S.
    Small; 2012 Oct 22; 8(20):3111-5. PubMed ID: 22851454
    [No Abstract] [Full Text] [Related]

  • 17. Inkjet printed, high mobility inorganic-oxide field effect transistors processed at room temperature.
    Dasgupta S, Kruk R, Mechau N, Hahn H.
    ACS Nano; 2011 Dec 27; 5(12):9628-38. PubMed ID: 22077094
    [Abstract] [Full Text] [Related]

  • 18. SnO2 nanowire logic devices on deformable nonplanar substrates.
    Shin G, Bae MY, Lee HJ, Hong SK, Yoon CH, Zi G, Rogers JA, Ha JS.
    ACS Nano; 2011 Dec 27; 5(12):10009-16. PubMed ID: 22084941
    [Abstract] [Full Text] [Related]

  • 19. An all-metallic logic gate based on current-driven domain wall motion.
    Xu P, Xia K, Gu C, Tang L, Yang H, Li J.
    Nat Nanotechnol; 2008 Feb 27; 3(2):97-100. PubMed ID: 18654469
    [Abstract] [Full Text] [Related]

  • 20. Vertically integrated logic circuits constructed using ZnO-nanowire-based field-effect transistors on plastic substrates.
    Kang J, Moon T, Jeon Y, Kim H, Kim S.
    J Nanosci Nanotechnol; 2013 May 27; 13(5):3526-8. PubMed ID: 23858894
    [Abstract] [Full Text] [Related]

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